Question

The circuit shown below gives the output as that of A

• A. AND gate
• B. OR gate
• C. NAND gate
• D. NOR gate
• E. NOT gate

Hint:

Double inversion cancels: $(X')' = X$. Always simplify step-by-step.

Answer 1

The Correct Option is A

Concept: Logic gate reduction using De Morgan's laws
---

Step 1: Identify individual blocks from the circuit

• First gate (top): AND gate with a bubble at output → NAND gate \[ (A \cdot B)' \]
• Input $C$ passes through an inverter → \[ \overline{C} \]
• Final gate: OR gate with output bubble → NOR gate ---

Step 2: Write the complete output expression
Input to final NOR gate: \[ Y = \left[(A \cdot B)' + \overline{C}\right]' \] ---

Step 3: Apply De Morgan's Law
\[ Y = \left[(A \cdot B)'\right]' \cdot (\overline{C})' \] ---

Step 4: Simplify each term
\[ \left[(A \cdot B)'\right]' = A \cdot B \] \[ (\overline{C})' = C \] ---

Step 5: Final simplified expression
\[ Y = (A \cdot B)\cdot C \] \[ Y = ABC \] ---

Step 6: Interpretation

• Output is 1 only when all inputs A, B, and C are 1
• This is exactly the behavior of an AND gate --- Physical Insight:

• Multiple inversions cancel out
• Complex circuit reduces to simple AND operation
• This is a classic example of logic simplification --- Final Answer: \[ \boxed{\text{AND gate}} \]