Question

Minimum number of 2-input NAND gates required to implement XOR is

• A. 3
• B. 4
• C. 5
• D. 6

Hint:

Memorize the gate counts for standard realizations:
- XOR using NAND gates $\rightarrow$ 4.
- XNOR using NAND gates $\rightarrow$ 5.
- XOR using NOR gates $\rightarrow$ 5.
- XNOR using NOR gates $\rightarrow$ 4.

Answer 1

The Correct Option is B

Step 1: Understanding the Question:
The question asks for the minimum number of 2-input NAND gates needed to realize a 2-input Exclusive-OR (XOR) logic gate.

Step 2: Detailed Explanation:

• The Boolean expression for a 2-input XOR gate is:
\[ Y = A \oplus B = A\bar{B} + \bar{A}B \]
• We can implement this expression using NAND gates by mathematically restructuring it:
Let us define the first intermediate term as the NAND of the inputs:
\[ G_1 = \overline{A \cdot B} \]
• Next, we feed \( A \) and \( G_1 \) into a second NAND gate:
\[ G_2 = \overline{A \cdot G_1} = \overline{A \cdot \overline{A \cdot B}} = \bar{A} + (A \cdot B) = \bar{A} + B \]
• Similarly, feed \( B \) and \( G_1 \) into a third NAND gate:
\[ G_3 = \overline{B \cdot G_1} = \overline{B \cdot \overline{A \cdot B}} = \bar{B} + (A \cdot B) = \bar{B} + A \]
• Finally, feed the outputs of the second and third gates into a fourth NAND gate:
\[ Y = \overline{G_2 \cdot G_3} = \overline{(\bar{A} + B) \cdot (\bar{B} + A)} \] Applying De Morgan's Law:
\[ Y = \overline{\bar{A} + B} + \overline{\bar{B} + A} = A\bar{B} + \bar{A}B \]
• This logic structure requires exactly 4 NAND gates.