Question:
A standard n-type MOSFET, biased in the saturation region, has the following parasitic capacitances:
1. \(C_{GS}\): gate to source capacitance
2. \(C_{GD}\): gate to drain capacitance
3. \(C_{DS}\): drain to source capacitance
Which one of the following options is correct?
A standard n-type MOSFET, biased in the saturation region, has the following parasitic capacitances:
1. \(C_{GS}\): gate to source capacitance
2. \(C_{GD}\): gate to drain capacitance
3. \(C_{DS}\): drain to source capacitance
Which one of the following options is correct?
1. \(C_{GS}\): gate to source capacitance
2. \(C_{GD}\): gate to drain capacitance
3. \(C_{DS}\): drain to source capacitance
Which one of the following options is correct?
Show Hint
In saturation the pinched-off channel's charge sits mostly near the source, making CGS the largest and the junction-only CDS the smallest.
Updated On: Jul 16, 2026
- \(C_{GS} > C_{GD} > C_{DS}\)
- \(C_{GD} > C_{DS} > C_{GS}\)
- \(C_{DS} > C_{GD} > C_{GS}\)
- \(C_{GD} > C_{GS} > C_{DS}\)
Show Solution
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The Correct Option is A
Solution and Explanation
Step 1: Understanding the Question:
We need to rank the three parasitic capacitances of an n-type MOSFET operating in the saturation region: gate-to-source (\(C_{GS}\)), gate-to-drain (\(C_{GD}\)), and drain-to-source (\(C_{DS}\)).
Step 2: Key Formula or Approach:
These capacitances come from two sources: the gate-oxide capacitance that couples the gate to the channel underneath it, and small fixed overlap capacitances where the gate metal physically overlaps the source and drain regions. In saturation, the channel is pinched off before it reaches the drain, so the channel charge is not shared equally between source and drain, it leans almost entirely toward the source side.
Step 3: Detailed Explanation:
\(C_{GS}\): In saturation, essentially the entire inversion channel charge is electrostatically coupled to the source end of the gate (since the channel pinches off near the drain), and on top of that there is a gate-source overlap capacitance. This makes \(C_{GS}\) the largest of the three by a wide margin, typically modeled as about \(\frac{2}{3}\) of the total gate-oxide capacitance plus the overlap term.
\(C_{GD}\): Since the channel is pinched off at the drain end in saturation, the gate no longer couples to the channel charge on that side. \(C_{GD}\) is then just the small parasitic overlap capacitance where the gate physically overlaps the drain diffusion, so it is much smaller than \(C_{GS}\), but it is still a real, non-zero, gate-oxide-related overlap term.
\(C_{DS}\): This capacitance comes only from the drain-to-source path through the body/substrate, mainly the reverse-biased drain-body junction capacitance and stray coupling, with no gate-oxide contribution at all. This makes it the smallest of the three in a well-designed MOSFET.
So the order from largest to smallest is \(C_{GS}\), then \(C_{GD}\), then \(C_{DS}\).
Step 4: Final Answer:
\(C_{GS} > C_{GD} > C_{DS}\), so option (A) is correct.
We need to rank the three parasitic capacitances of an n-type MOSFET operating in the saturation region: gate-to-source (\(C_{GS}\)), gate-to-drain (\(C_{GD}\)), and drain-to-source (\(C_{DS}\)).
Step 2: Key Formula or Approach:
These capacitances come from two sources: the gate-oxide capacitance that couples the gate to the channel underneath it, and small fixed overlap capacitances where the gate metal physically overlaps the source and drain regions. In saturation, the channel is pinched off before it reaches the drain, so the channel charge is not shared equally between source and drain, it leans almost entirely toward the source side.
Step 3: Detailed Explanation:
\(C_{GS}\): In saturation, essentially the entire inversion channel charge is electrostatically coupled to the source end of the gate (since the channel pinches off near the drain), and on top of that there is a gate-source overlap capacitance. This makes \(C_{GS}\) the largest of the three by a wide margin, typically modeled as about \(\frac{2}{3}\) of the total gate-oxide capacitance plus the overlap term.
\(C_{GD}\): Since the channel is pinched off at the drain end in saturation, the gate no longer couples to the channel charge on that side. \(C_{GD}\) is then just the small parasitic overlap capacitance where the gate physically overlaps the drain diffusion, so it is much smaller than \(C_{GS}\), but it is still a real, non-zero, gate-oxide-related overlap term.
\(C_{DS}\): This capacitance comes only from the drain-to-source path through the body/substrate, mainly the reverse-biased drain-body junction capacitance and stray coupling, with no gate-oxide contribution at all. This makes it the smallest of the three in a well-designed MOSFET.
So the order from largest to smallest is \(C_{GS}\), then \(C_{GD}\), then \(C_{DS}\).
Step 4: Final Answer:
\(C_{GS} > C_{GD} > C_{DS}\), so option (A) is correct.
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