Question

Input bits X and Y are added by using the combinational logic as shown below. S represents the sum of the two bits. For a correct implementation of the sum, the signals \(D_0, D_1, D_2, D_3\) are _________, respectively.

• A. 1, 0, 0, 1
• B. 0, 1, 0, 1
• C. 1, 0, 1, 1
• D. 0, 1, 1, 0

Hint:

To identify inputs for a sum-bit circuit, remember that binary addition sum follows XOR logic. Only the minterms where inputs differ should be activated.

Answer 1

The Correct Option is A

Step 1: Understanding the Circuit

The given logic diagram shows four AND gates whose outputs are ORed to produce the final sum \( S \). Each AND gate is enabled by one of the signals \( D_0, D_1, D_2, D_3 \). The gates are arranged such that each AND implements one minterm of the XOR truth table.

Step 2: Recall XOR Truth Table

The sum bit for adding two bits is \( S = X \oplus Y \). The truth table for XOR is:

X	Y	S
0	0	0
0	1	1
1	0	1
1	1	0

Thus, only minterms \( m_1 \) and \( m_2 \) must be active.

Step 3: Matching Minterms with \( D_0, D_1, D_2, D_3 \)

• \( D_0 \) corresponds to \( X' = 1, Y' = 1 \) → must be 0 because the XOR output is 0.
• \( D_1 \) corresponds to \( X' = 1, Y = 1 \) → must be 1 because the XOR output is 1.
• \( D_2 \) corresponds to \( X = 1, Y' = 1 \) → must be 1.
• \( D_3 \) corresponds to \( X = 1, Y = 1 \) → must be 0 because the XOR output is 0.

Step 4: Vector Check

Comparing with the given options, the correct configuration is:

\( D_0 = 1, D_1 = 0, D_2 = 0, D_3 = 1 \) which matches option (A).