Question

The 8085 uses which technique for memory and I/O access ?

• A. Separate memory and I/O buses
• B. Multiplexed address/data bus
• C. Harvard architecture
• D. Fully asynchronous bus

Hint:

In 8085: \[ AD0-AD7 \] are multiplexed lines carrying:
• Lower address bits during T1
• Data during remaining cycles ALE signal is used to demultiplex the address.

Answer 1

The Correct Option is B

Concept: The 8085 microprocessor uses:
• A multiplexed lower-order address and data bus.
• AD0--AD7 lines carry both address and data. This technique reduces the number of pins required in the microprocessor package.

Step 1: Understand multiplexing in 8085. In 8085:
• During the first clock cycle, AD0--AD7 carry lower-order address bits.
• During later cycles, the same lines carry data. Hence the bus is called: \[ \text{Multiplexed address/data bus} \]

Step 2: Examine option A. 8085 does not use completely separate buses like Harvard architecture. Therefore: \[ A \text{ is incorrect} \]

Step 3: Examine option B. 8085 indeed uses multiplexed buses. Thus: \[ B \text{ is correct} \]

Step 4: Examine option C. Harvard architecture uses separate instruction and data memories. 8085 follows Von Neumann architecture. Hence: \[ C \text{ is incorrect} \]

Step 5: Examine option D. 8085 operation is synchronized with clock pulses and is not fully asynchronous. Therefore: \[ D \text{ is incorrect} \]

Step 6: Write the final answer. Hence the correct option is: \[ \boxed{(B)\ \text{Multiplexed address/data bus}} \]