Question:

Six logic gates are connected as shown in the figure. The values of \( y_1, y_2 \) and \( y_3 \) respectively are

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Pay close attention to the small circles ("bubbles") at the outputs of logic gates. A bubble indicates inversion (NOT operation). For example, an OR gate becomes a NOR gate with the addition of a bubble.
Updated On: Mar 30, 2026
  • (0,1,0)
  • (1,0,0)
  • (0,0,1)
  • (0,0,0)
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The Correct Option is D

Solution and Explanation

Step 1: Understanding the Concept:

The problem requires analyzing a digital logic circuit composed of six gates to determine the output states \( y_1 \), \( y_2 \), and \( y_3 \) given specific binary inputs. We must identify each gate by its schematic symbol and apply the corresponding logic operation (Truth Table).
Step 2: Key Formula or Approach:

Gate Identification:
  • NAND Gate:
    Symbol looks like an AND gate (D-shape) with a bubble at the output. Operation: \( Y = \overline{A \cdot B} \).
  • OR Gate:
    Symbol has a curved input side. Operation: \( Y = A + B \).
  • NOR Gate:
    Symbol looks like an OR gate with a bubble at the output. Operation: \( Y = \overline{A + B} \).
  • AND Gate:
    Symbol is D-shaped with no bubble. Operation: \( Y = A \cdot B \).

Step 3: Detailed Explanation:

Let's label the gates and trace the signals from left to right. Column 1 (Leftmost Gates):
  • Top Gate (Gate 1):
    This is a NAND gate. Inputs: 1, 0. Output \( O_1 = \overline{1 \cdot 0} = \overline{0} = 1 \).
  • Middle Gate (Gate 2):
    This is a NAND gate. Inputs: 1, 1. Output \( O_2 = \overline{1 \cdot 1} = \overline{1} = 0 \).
  • Bottom Gate (Gate 3):
    This is an OR gate (curved back, no bubble). Inputs: 0, 1. Output \( O_3 = 0 + 1 = 1 \).
Column 2 (Middle Gates):
  • Top-Middle Gate (Producing \( y_1 \)):
    This is a NOR gate (OR shape with bubble). Inputs: Output of Gate 1 (\(O_1 = 1\)) and Output of Gate 2 (\(O_2 = 0\)). \( y_1 = \overline{O_1 + O_2} = \overline{1 + 0} = \overline{1} = 0 \).
  • Bottom-Middle Gate (Producing \( y_2 \)):
    This is a NOR gate. Inputs: Output of Gate 2 (\(O_2 = 0\)) and Output of Gate 3 (\(O_3 = 1\)). \( y_2 = \overline{O_2 + O_3} = \overline{0 + 1} = \overline{1} = 0 \).
Column 3 (Rightmost Gate):
  • Final Gate (Producing \( y_3 \)):
    This is an AND gate (D-shape, no bubble). Inputs: \( y_1 = 0 \) and \( y_2 = 0 \). \( y_3 = y_1 \cdot y_2 = 0 \cdot 0 = 0 \).

Step 4: Final Answer:

The values are \( y_1 = 0 \), \( y_2 = 0 \), and \( y_3 = 0 \). Thus, the tuple is (0, 0, 0).
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