Concept:
When an interrupt occurs in 8085 microprocessor, the processor temporarily stops the current program execution and executes an Interrupt Service Routine (ISR).
The interrupt handling process follows a systematic sequence:
• Interrupt recognition
• Saving current execution state
• Fetching interrupt vector
• Branching to ISR
Step 1: Interrupt acknowledgement.
When an interrupt request arrives:
• The processor first checks whether interrupts are enabled.
• If valid, the interrupt is acknowledged.
This corresponds to:
\[
A
\]
Thus:
\[
A \text{ occurs first}
\]
Step 2: Saving the current program execution state.
Before servicing the interrupt:
• The processor must preserve the current execution information.
• Typically, the Program Counter (PC) contents are pushed onto the stack.
This ensures the interrupted program can resume later.
This corresponds to:
\[
B
\]
Hence:
\[
B \text{ occurs second}
\]
Step 3: Reading the interrupt vector.
After saving current status:
• The processor fetches the interrupt vector address.
• The vector specifies the starting location of ISR.
This corresponds to:
\[
D
\]
Thus:
\[
D \text{ occurs third}
\]
Step 4: Transfer of control to ISR.
Finally:
• The processor jumps to ISR address.
• Execution of interrupt service routine begins.
This corresponds to:
\[
C
\]
Therefore:
\[
C \text{ occurs last}
\]
Step 5: Write the complete sequence.
Hence the correct order is:
\[
A \rightarrow B \rightarrow D \rightarrow C
\]
Step 6: Write the final answer.
Thus the correct option is:
\[
\boxed{(B)\ A,\ B,\ D,\ C}
\]