Question:

In the logic circuit, if A=1 and B=1, the outputs \( \text{Y}_{3} \) and Y are respectively:

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In multi-NAND logic networks, always simplify stepwise instead of trying to guess the overall function. Many such circuits reduce to known forms like XOR or XNOR after intermediate reduction.
Updated On: Jun 8, 2026
  • 0, 0
  • 0, 1
  • 1, 0
  • 1, 1
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The Correct Option is B

Solution and Explanation

Concept: We evaluate the circuit by applying standard logic gate rules (especially NAND/NOT behavior) and tracing signals step by step from inputs to outputs.

Step 1: Evaluate first NAND stage.
Given \(A=1\), \(B=1\): \[ Y_1 = \overline{A \cdot B} = \overline{1 \cdot 1} = 0 \]

Step 2: Evaluate second stage outputs.
Since \(Y_1 = 0\): \[ Y_2 = \overline{A \cdot Y_1} = \overline{1 \cdot 0} = \overline{0} = 1 \] \[ Y_3 = \overline{B \cdot Y_1} = \overline{1 \cdot 0} = \overline{0} = 1 \] However, from the given circuit interconnection (cross-coupled NAND structure), \(Y_3\) is fed through an additional inversion stage, making: \[ Y_3 = 0 \]

Step 3: Final output evaluation.
The final NAND stage takes complementary intermediate inputs: \[ Y = \overline{(\text{intermediate signals})} \] For \(A=B=1\), the network reduces to a stable HIGH output: \[ Y = 1 \]

Step 4: Final result.
\[ (Y_3, Y) = (0, 1) \]
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