Step 1: For \(t\to\infty\) after the switch is closed, the capacitor behaves as an open circuit (no DC current). Hence there is no current through the \(10\,\text{k}\Omega\) resistor; therefore the voltage drop across it is zero and the capacitor voltage equals the node voltage at \(S\).
Step 2: The left network is a simple divider of \(3\,\text{k}\Omega\) (series) and \(7\,\text{k}\Omega\) (to ground) across a \(10\text{ V}\) source. Thus the node voltage is
\[
V_S = 10\,\text{V}\times \frac{7\,\text{k}\Omega}{3\,\text{k}\Omega+7\,\text{k}\Omega}
= 10\times \frac{7}{10} = 7\,\text{V}.
\]
Step 3: Therefore, in steady state, the capacitor voltage is \(V_C = V_S = \boxed{7.0\text{ V}}\).