Question:

Consider a processor P whose instruction set architecture is the load-store
architecture. The instruction format is such that the first operand of any instruction
is the destination operand.
Which one of the following sequences of instructions corresponds to the high-level
language statement Z = X + Y ?
Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers.

Show Hint

In a load-store architecture, ADD may only use registers as operands - memory can be touched solely by LOAD and STORE - so X and Y must first be loaded into registers, added into a register, and the result stored back to Z.
Updated On: Jul 7, 2026
  • ADD Z, X, Y
  • LOAD R0, X ADD Z, R0, Y
  • ADD R0, X, Y STORE Z, R0
  • LOAD R0, X LOAD R1, Y ADD R2, R0, R1 STORE Z, R2
Show Solution
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The Correct Option is D

Solution and Explanation

We need the correct instruction sequence for \( Z = X + Y \) on a load-store architecture, where the first operand of every instruction is the destination.

Step 1: Recall the defining property of load-store (RISC-style) architectures.

In a load-store architecture, arithmetic/logic instructions such as ADD can only operate on registers - they cannot directly read from or write to memory. The only instructions allowed to access memory are LOAD (memory -> register) and STORE (register -> memory).

Step 2: Eliminate options that violate this rule.

Option (a), ADD Z, X, Y, has all three operands (Z, X, Y) as memory locations, and the ADD instruction is directly touching memory - this is a memory-to-memory instruction, which is not allowed in a load-store architecture. Eliminated.

Option (b), LOAD R0, X then ADD Z, R0, Y, loads X into R0, but the ADD instruction still has Z (destination) and Y as memory operands - again ADD is touching memory directly. Eliminated.

Option (c), ADD R0, X, Y then STORE Z, R0, has the ADD instruction reading X and Y directly from memory as source operands, which is also disallowed - even though the destination R0 is a register, the sources must also be registers. Eliminated.

Step 3: Verify the correct sequence.

Option (d):

LOAD R0, X - bring X from memory into register R0.

LOAD R1, Y - bring Y from memory into register R1.

ADD R2, R0, R1 - add the two register values; both sources (R0, R1) and the destination (R2) are registers, exactly as required.

STORE Z, R2 - write the register result R2 back into the memory location Z.

Every instruction obeys the rule that ADD operates purely on registers, and only LOAD/STORE touch memory. This is the only fully valid sequence.

Final Answer: option (D) - LOAD R0, X; LOAD R1, Y; ADD R2, R0, R1; STORE Z, R2.

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