Question:
Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:
(i) The processor saves the content of the program counter.
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.
Which ONE of the following is the CORRECT sequence of steps?
Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:
(i) The processor saves the content of the program counter.
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.
Which ONE of the following is the CORRECT sequence of steps?
(i) The processor saves the content of the program counter.
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.
Which ONE of the following is the CORRECT sequence of steps?
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When dealing with interrupts, remember that the current instruction must be completed first. After that, the state (program counter) is saved, and the ISR address is loaded into the program counter.
Updated On: Jan 30, 2026
- (iii), (i), (ii)
- (i), (ii), (iii)
- (i), (ii), (iii)
- (iii), (ii), (i)
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The Correct Option is A
Solution and Explanation
When an interrupt occurs in a non-pipelined processor, the processor follows a specific sequence of steps to handle the interrupt. The general process is as follows:
1. Step (iii): The processor finishes the present instruction. This is necessary because the processor cannot leave the current instruction unfinished when the interrupt occurs. It must complete the instruction before handling the interrupt.
2. Step (i): After completing the current instruction, the processor saves the content of the program counter (PC). This is crucial because the processor needs to remember the location in the program where it left off, so it can resume from that point once the interrupt has been handled.
3. Step (ii): The program counter is then loaded with the start address of the interrupt service routine (ISR). This step ensures that the processor starts executing the ISR instead of continuing the normal program flow.
Thus, the correct order is:
1. Finish the present instruction (iii),
2. Save the content of the program counter (i),
3. Load the program counter with the ISR address (ii).
Therefore, the correct answer is (A) (iii), (i), (ii).
1. Step (iii): The processor finishes the present instruction. This is necessary because the processor cannot leave the current instruction unfinished when the interrupt occurs. It must complete the instruction before handling the interrupt.
2. Step (i): After completing the current instruction, the processor saves the content of the program counter (PC). This is crucial because the processor needs to remember the location in the program where it left off, so it can resume from that point once the interrupt has been handled.
3. Step (ii): The program counter is then loaded with the start address of the interrupt service routine (ISR). This step ensures that the processor starts executing the ISR instead of continuing the normal program flow.
Thus, the correct order is:
1. Finish the present instruction (iii),
2. Save the content of the program counter (i),
3. Load the program counter with the ISR address (ii).
Therefore, the correct answer is (A) (iii), (i), (ii).
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