Question:
The output of a 2-input multiplexer is connected back to one of its inputs as shown in the figure. Match the functional equivalence of this circuit to one of the following options.
The output of a 2-input multiplexer is connected back to one of its inputs as shown in the figure. Match the functional equivalence of this circuit to one of the following options.
Show Hint
A multiplexer with feedback can easily implement latches.
Remember: MUX + feedback $\Rightarrow$ Latch.
Latches are level-sensitive, while flip-flops are edge-triggered.
Remember: MUX + feedback $\Rightarrow$ Latch.
Latches are level-sensitive, while flip-flops are edge-triggered.
Updated On: Feb 3, 2026
- D Flip-flop
- D Latch
- Half-adder
- Demultiplexer
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The Correct Option is B
Solution and Explanation
Step 1: Understanding the circuit.
A 2-to-1 multiplexer has two data inputs (labelled 0 and 1), one select input (S), and one output (Q).
Here, the output $Q$ is fed back to input '0', while an external data input is applied at input '1'.
Step 2: Behavior of the MUX.
When $S=0$: The multiplexer output $Q$ is connected to input '0'. But since '0' is already $Q$, this creates a feedback loop and the output holds its previous value.
When $S=1$: The multiplexer output $Q$ follows the external data input (D).
Step 3: Functional equivalence.
This is exactly how a D latch works:
When Enable (S=1) $\Rightarrow$ Output follows input D.
When Enable (S=0) $\Rightarrow$ Output holds its previous value.
Step 4: Eliminating wrong options.
(A) D Flip-flop: Requires clock edge triggering, which is not present here. So False.
(C) Half-adder: Performs arithmetic sum of two bits, not related here. False.
(D) Demultiplexer: Performs data distribution to multiple outputs, not applicable here. False.
\[ \boxed{\text{The circuit is functionally equivalent to a D Latch.}} \]
A 2-to-1 multiplexer has two data inputs (labelled 0 and 1), one select input (S), and one output (Q).
Here, the output $Q$ is fed back to input '0', while an external data input is applied at input '1'.
Step 2: Behavior of the MUX.
When $S=0$: The multiplexer output $Q$ is connected to input '0'. But since '0' is already $Q$, this creates a feedback loop and the output holds its previous value.
When $S=1$: The multiplexer output $Q$ follows the external data input (D).
Step 3: Functional equivalence.
This is exactly how a D latch works:
When Enable (S=1) $\Rightarrow$ Output follows input D.
When Enable (S=0) $\Rightarrow$ Output holds its previous value.
Step 4: Eliminating wrong options.
(A) D Flip-flop: Requires clock edge triggering, which is not present here. So False.
(C) Half-adder: Performs arithmetic sum of two bits, not related here. False.
(D) Demultiplexer: Performs data distribution to multiple outputs, not applicable here. False.
\[ \boxed{\text{The circuit is functionally equivalent to a D Latch.}} \]
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