Question

The digital circuit shown has 3 inputs (\(x\), \(y\), and \(z\)).

The simplified logical expression for the output (OUT) is:

• A. \(\bar{x}\,\overline{yz}\)
• B. \(0\)
• C. \(\bar{x}(y+z)\)
• D. \(1\)

Hint:

A 3-input NOR is 1 only when all inputs are 0; check what the rest of the circuit gives at exactly that one input combination.

Answer 1

The Correct Option is B

Step 1: Identify the gate structure.
Trace the circuit: a 3-input NOR gate takes \(x\), \(y\), \(z\) directly, giving
\[ N = \overline{x+y+z} \]
A NOT gate takes one of the inputs (say \(z\)) and gives \(\bar z\). Two AND gates combine this inverted signal and the remaining direct (uninverted) inputs, for example
\[ P = \bar z\,y,\qquad Q = x\,y \]
and an OR gate combines them:
\[ M = P+Q \]
Finally, the last AND gate combines \(N\) and \(M\):
\[ OUT = N\cdot M \]

Step 2: Notice when \(N\) can be \(1\).
A NOR gate output is \(1\) only when every one of its inputs is \(0\). So
\[ N=1 \iff x=0,\ y=0,\ z=0 \]
For every other input combination, \(N=0\).

Step 3: Check what happens when \(N=0\).
Whenever \(N=0\) (that is, whenever at least one of \(x,y,z\) is \(1\)), the final AND gate immediately gives
\[ OUT = N\cdot M = 0\cdot M = 0 \]
no matter what \(M\) works out to be.

Step 4: Check the one remaining case, \(x=y=z=0\).
Here \(N=1\), so we must look at \(M\). Both AND gates that feed into \(M\) always include at least one direct (uninverted) tap of \(x\), \(y\), or \(z\). Since \(x=y=z=0\) in this case, every such direct input is \(0\), so both AND gates output \(0\):
\[ P = \bar z\cdot y = (1)(0) = 0,\qquad Q = x\cdot y = (0)(0) = 0 \]
Hence
\[ M = P+Q = 0+0 = 0 \]

Step 5: Combine both cases.
So even in the one case where the NOR output is \(1\), the OR-of-ANDs branch \(M\) works out to \(0\), which again gives \(OUT=N\cdot M=1\cdot 0=0\).

Step 6: State the general reason.
This circuit is built so that the NOR gate is \(1\) only at \(x=y=z=0\), exactly the one input combination where any AND gate built from a direct (uninverted) literal must output \(0\). Since the last gate is an AND of the NOR output with this OR-of-ANDs signal, the two branches can never both be \(1\) at the same time, for any combination of \(x,y,z\).

Step 7: Conclude.
The output is \(0\) for every possible input combination, so OUT is identically zero, ruling out options (A), (C), and (D), which all describe an expression that is \(1\) for at least one input combination.

Final Answer:
\[ \boxed{OUT = 0} \]