Question

Match List - I with List - II. 

List - I		List - II
A.	Machine cycle	I.	Time required to complete one operation (Fetch/read/write)
B.	T-state	II.	One subdivision of a machine cycle
C.	Instruction cycle	III.	Time required to complete one instruction
D.	Opcode fetch	IV.	Machine cycle to get instruction opcode from memory

Choose the correct answer from the options given below:

• A. A-II, B-III, C-IV, D-I
• B. A-III, B-IV, C-I, D-II
• C. A-I, B-II, C-III, D-IV
• D. A-I, B-II, C-IV, D-III

Hint:

Hierarchy: Instruction Cycle $\to$ Machine Cycle $\to$ T-state. An instruction is made of cycles, and a cycle is made of T-states!

Answer 1

The Correct Option is C

Concept:
• CPU timing terminology describes the hierarchy of time units required for a processor to execute commands.
• Instruction Cycle: The total time from the start of fetching an instruction to the completion of its execution.
• Machine Cycle: The time required to perform a single basic operation involving the system bus, such as memory read, memory write, I/O read, or I/O write.
• T-state: The smallest unit of time, corresponding to one period of the system clock. A machine cycle consists of multiple T-states.

Step 1: Match A (Machine cycle)
A machine cycle is the basic unit of operation for a microprocessor bus. It is defined as the time required to complete one basic bus operation like fetching data from memory or writing to an I/O port. This matches with I.

Step 2: Match B (T-state)
T-states are the individual clock pulses that make up a machine cycle. For instance, in an 8085, a memory read machine cycle typically takes 3 T-states. It is the fundamental "subdivision" of the machine cycle. This matches with II.

Step 3: Match C (Instruction cycle)
The instruction cycle is the top-level time unit. It consists of multiple machine cycles (e.g., Opcode Fetch followed by Memory Read). It encompasses the entire process of getting and finishing an instruction. This matches with III.

Step 4: Match D (Opcode fetch)
Opcode fetch is the very first machine cycle of every instruction cycle. Its specific task is to provide the address to memory and retrieve the instruction's operation code (opcode). This matches with IV.