Concept:
When a microprocessor interfaces with external peripheral hardware components, data transfers must be synchronized because peripherals typically operate at much slower speeds than the host CPU. There are two primary software methods used to manage these transfers:
• Interrupt-Driven I/O: The CPU initiates a command and then immediately returns to executing its main program tasks. When the slow peripheral hardware finishes processing data, it sends an electrical alert signal to the CPU's interrupt pin, prompting the CPU to temporarily pause its current work and handle the data transfer. This keeps CPU usage highly efficient.
• Polling-Based (Programmed) I/O: The CPU continuously executes a tight conditional software loop, repeatedly reading a status register flag on the peripheral device to check when it is ready to transfer data.
Step 1: Analyzing CPU behavior during a polling loop.
Let us look at what happens inside the processor during a polling cycle. The software execution flow behaves like the following assembly loop sequence:
CHECK_READY: IN AL, STATUS_PORT ; Read peripheral status register
TEST AL, 01H ; Check if Ready flag bit is set
JZ CHECK_READY ; If flag is 0, jump back and try again
While the peripheral hardware is slowly preparing its data blocks, the CPU remains trapped in this three-instruction loop. Even though the processor is not performing any useful data computations, it is executing instructions at 100% of its clock capacity.
Step 2: Determining the impact on CPU utilization.
Because the CPU cannot break out of this status-checking loop to perform other background application operations, nearly all of its processing cycles are consumed by this waiting loop. This results in maximum CPU utilization spent purely on operational overhead. Therefore, Option (B) is the correct answer.