Question

Consider the following two statements about interrupt handling mechanisms in a CPU.

S1: In non-vectored interrupt mechanism, it usually takes more time to start the Interrupt Service Routine (ISR) when compared to that in a vectored interrupt mechanism.

S2: In daisy-chain interrupt mechanism, the CPU polls all the input devices individually to determine the source of the interrupt.

Which one of the following options is correct with respect to S1 and S2?

• A. Both S1 and S2 are true
• B. Both S1 and S2 are false
• C. S1 is true and S2 is false
• D. S1 is false and S2 is true

Hint:

Vectored interrupts hand over the ISR address directly (fast); non-vectored needs an extra identification step (slow). Daisy chaining resolves priority through a hardware chain, not CPU polling.

Answer 1

The Correct Option is C

Step 1: Recall how non-vectored and vectored interrupts find the ISR address.
In a vectored interrupt mechanism, the interrupting device itself supplies (or the CPU reads from a fixed table using) the address of its ISR directly during the interrupt acknowledge cycle, so the CPU can jump to the correct ISR almost immediately.
In a non-vectored interrupt mechanism, the CPU does not get the ISR address directly. It has to run a short identification routine, checking each device's status one by one, before it can work out the source and start the correct ISR.

Step 2: Evaluate S1.
Because non-vectored handling needs this extra device-identification step before the ISR even starts, it takes more time to reach the ISR than the vectored scheme, where the address is available right away. So S1 is TRUE.

Step 3: Recall how daisy-chain interrupt priority works.
Daisy chaining is a hardware based priority resolution technique. All interrupting devices are wired in a series (a chain) sharing one interrupt request line and one interrupt acknowledge line. When the CPU sends the acknowledge signal, it ripples down the chain from device to device; the first device that is actually requesting an interrupt intercepts the signal and places its own vector on the bus, without passing the signal further.

Step 4: Evaluate S2.
This means daisy chaining resolves the source and priority through the hardware chain itself, not through the CPU checking each device one at a time in software. Individually polling every device describes the separate software-polling method, not daisy chaining. So S2 is FALSE.

Step 5: Match with the options.
S1 is true and S2 is false, so "both true", "both false" and "S1 false, S2 true" are all wrong, leaving "S1 true and S2 false" as correct.

Final Answer:
S1 is true and S2 is false. \[ \boxed{\text{Option (C)}} \]