Question

Consider a computer with a \(4 \, \text{MHz}\) processor. Its DMA controller can transfer \(8 \, \text{bytes}\) in \(1\) cycle from a device to main memory through cycle stealing at regular intervals. Which one of the following is the data transfer rate (in bits per second}) of the DMA controller if \(1\%\) of the processor cycles are used for DMA?

• A. \(2,56,000\)
• B. \(3,200\)
• C. \(25,60,000\)
• D. \(32,000\)

Hint:

For DMA transfer rate calculations, multiply the number of cycles allocated for DMA by the data transferred per cycle.

Answer 1

The Correct Option is C

Processor speed = \(4 \, \text{MHz} = 4 \times 10^6 \, \text{cycles per second}\).
DMA uses \(1\%\) of processor cycles, so the number of cycles used for DMA: \[
{DMA cycles} = 1\% \times 4 \times 10^6 = 4 \times 10^4 \, \text{cycles per second}. \]
Data transferred per DMA cycle = \(8 \, \text{bytes} = 8 \times 8 = 64 \, \text{bits}\).
Total data transfer rate: \[
{Rate} = \text{DMA cycles} \times \text{Data per cycle} = 4 \times 10^4 \times 64 = 25,60,000 \, \text{bits per second}. \] Final Answer: \[ \boxed{25,60,000 \, \text{bits per second}} \]