Question

Consider a system with 2 KB direct-mapped data cache with a block size of 64 bytes. The system has a physical address space of 64 KB and a word length of 16 bits. During the execution of a program, four data words P, Q, R, and S are accessed in that order 10 times (i.e., PQRSPQRS…). Hence, there are 40 accesses to data cache altogether. Assume that the data cache is initially empty and no other data words are accessed by the program. The addresses of the first bytes of P, Q, R, and S are 0xA248, 0xC28A, 0xCA8A, and 0xA262, respectively. For the execution of the above program, which of the following statements is/are TRUE with respect to the data cache?

• A. Every access to S is a hit.
• B. Once P is brought to the cache it is never evicted.
• C. At the end of the execution only R and S reside in the cache.
• D. Every access to R evicts Q from the cache.

Hint:

In a direct-mapped cache, each address maps to exactly one cache block. If multiple addresses map to the same block, the most recent one accessed will evict the previous one.

Answer 1

The Correct Option is A, B, D

The cache is direct-mapped with a block size of 64 bytes and a total size of 2 KB, meaning there are 32 blocks in the cache. The addresses of P, Q, R, and S are given in hexadecimal, and we need to determine which cache block they map to. 1. Mapping of addresses to cache blocks: The addresses are 16 bits long, and the cache block size is 64 bytes, so the block index is determined by the lower 6 bits of the address. The addresses map as follows: - P: Address 0xA248 → Maps to cache block (P maps to a specific block in the cache).
- Q: Address 0xC28A → Maps to another cache block.
- R: Address 0xCA8A → Maps to a different block.
- S: Address 0xA262 → Maps to the same cache block as P.
2. Statement (A): Every access to S is a hit because S shares the same cache block as P and they are accessed together 10 times. 3. Statement (B): Once P is brought into the cache, it is never evicted. Since P and S map to the same cache block, once P is placed in the cache, it stays there until S is accessed. 4. Statement (D): Every access to R evicts Q from the cache because R and Q map to the same cache block (determined by the block index), and since R is accessed after Q, it replaces Q in the cache. Thus, the correct answers are (A), (B), and (D).