In the circuit shown below, $D_1$ and $D_2$ are silicon diodes with cut-in voltage of 0.7 V. $V_{IN}$ and $V_{OUT}$ are input and output voltages in volts. The transfer characteristic is _____________
In the circuit shown below, switch S was closed for a long time. If the switch is opened at $t=0$, the maximum magnitude of the voltage $V_R$, in volts, is _____________ (rounded off to the nearest integer).
For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is ___________ (rounded off to the nearest integer).
In the circuit shown below, the current $i$ flowing through $200\,\Omega$ resistor is ________ mA (rounded off to two decimal places).
For a MOS capacitor, $V_{fb}$ and $V_t$ are the flat-band voltage and the threshold voltage, respectively. The variation of the depletion width ($W_{\text{dep}}$) for varying gate voltage ($V_g$) is best represented by