Question

Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence \([ABCD]\) of initial logic states, which will not change with clock, is .............................. \begin{center} \includegraphics[width=0.55\textwidth]{28.jpeg} \end{center}

Hint:

Stable states in sequential logic can be found by equating flip-flop next states to their current states and solving Boolean consistency conditions.

Answer 1

Step 1: Analyze NOR gate.
NOR gate input: \(A\) and feedback from first flip-flop output \(\overline{Q}\). So output of NOR = \(B = \overline{A + \overline{Q}}\).

Step 2: Analyze XOR gate.
XOR inputs: \(B\) and \(C\) (output of second flip-flop). So: \[ D = B \oplus C \]

Step 3: Stable state condition.
For stability, the inputs of flip-flops must not change outputs on clock edges. This requires consistency of feedback equations. - Assume \(A=1, B=1, C=0, D=0\). Then feedback equations satisfied. Binary sequence: \([A B C D] = 1100\).

Step 4: Decimal equivalent.
\[ (1100)_2 = 8 + 4 = 12 \]

Final Answer:
\[ \boxed{12} \]