Concept:
A MOSFET operates in three primary structural regions based on the terminal bias voltages applied: Cutoff, Linear (Triode), and Saturation.
The gate-to-source voltage (\( V_{GS} \)) relative to the device's threshold voltage (\( V_{th} \)) determines whether a conducting inversion channel exists beneath the gate oxide layer.
Step 1: Define the condition for the Cutoff region.
For an enhancement-mode NMOS transistor, a conducting channel of free electrons forms only when the gate-to-source voltage exceeds the threshold voltage:
\[
V_{GS} \geq V_{th}
\]
If the applied gate voltage is lower than this required threshold value:
\[
V_{GS} < V_{th}
\]
The voltage is insufficient to attract enough minority carriers (electrons) to the channel region to cause inversion. As a result, no conducting channel forms between the source and drain diffusions.
Step 2: Analyze the resulting electrical characteristics.
Without an inversion layer, the source-to-drain path resembles two reverse-biased p-n junctions placed back-to-back. The resistance between the drain and source is extremely high, approaching an open circuit.
Consequently, the primary drain current is zero (ignoring tiny subthreshold leakage currents):
\[
I_D = 0
\]
This state defines the cutoff region.
Step 3: Compare with the other options.
• \( V_{GS} > V_{th} \): This turns the transistor ON, placing it in either the linear or saturation region depending on \( V_{DS} \).
• \( V_{DS} = 0 \): When the device is ON, this condition results in zero current, but it does not define the cutoff region.
• \( V_{GS} = V_{DS} \): If the device is ON, this bias configuration forces it into the saturation region since \( V_{DS} > V_{GS} - V_{th} \).
Therefore, cutoff occurs specifically when \( V_{GS} < V_{th} \).