Question

Let R1 and R2 be two 4-bit registers that store numbers in 2's complement form. For the operation R1 + R2, which one of the following values of R1 and R2 gives an arithmetic overflow?

• A. R1 = 1011 and R2 = 1110
• B. R1 = 1100 and R2 = 1010
• C. R1 = 0011 and R2 = 0100
• D. R1 = 1001 and R2 = 1111

Hint:

In 2's complement arithmetic, overflow occurs when the result falls outside the representable range. For an n-bit register, the range is from \(-2^{n-1}\) to \(2^{n-1}-1\).

Answer 1

The Correct Option is B

In 2's complement arithmetic, overflow occurs when the result of an addition exceeds the capacity of the register, meaning the sum cannot be represented correctly within the given bit-width. Let's break down the options: - R1 = 1011 and R2 = 1110: R1 = 1011 is -5 (in 2's complement) and R2 = 1110 is -2. Adding these gives: \[ -5 + (-2) = -7 \] But, in 4-bit 2's complement, the range is from -8 to +7. The result -7 is within the range, so no overflow.
- R1 = 1100 and R2 = 1010: R1 = 1100 is -4 and R2 = 1010 is -6. Adding these gives: \[ -4 + (-6) = -10 \] This is an overflow because -10 cannot be represented in a 4-bit 2's complement register.
- R1 = 0011 and R2 = 0100: R1 = 0011 is +3 and R2 = 0100 is +4. Adding these gives: \[ 3 + 4 = 7 \] The result 7 is within the range, so no overflow. - R1 = 1001 and R2 = 1111: R1 = 1001 is -7 and R2 = 1111 is -1. Adding these gives: \[ -7 + (-1) = -8 \] -8 is the lower limit of the range, so there is no overflow.
Therefore, the correct answer is (A) because it represents the situation where an arithmetic overflow occurs in 4-bit 2's complement arithmetic.