In a given sequential circuit, initial states are $Q_1 = 1$ and $Q_2 = 0$. For a clock frequency of 1 MHz, the frequency of signal $Q_2$ in kHz, is ___________ (rounded off to the nearest integer). 
For a MOS capacitor, $V_{fb}$ and $V_t$ are the flat-band voltage and the threshold voltage, respectively. The variation of the depletion width ($W_{\text{dep}}$) for varying gate voltage ($V_g$) is best represented by
In the circuit shown below, P and Q are the inputs. The logical function realized by the circuit shown below is 
The synchronous sequential circuit shown below works at a clock frequency of 1 GHz. The throughput, in Mbits/s, and the latency, in ns, respectively, are 
For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is ___________ (rounded off to the nearest integer). 
In a given sequential circuit, initial states are $Q_1=1$ and $Q_2=0$. For a clock frequency of 1 MHz, the frequency of signal $Q_2$ in kHz, is ___________ (rounded off to the nearest integer).
For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is ___________ (rounded off to the nearest integer). 
“I cannot support this proposal. My ___________ will not permit it.”
Courts : _________ :: Parliament : Legislature ; (By word meaning)
What is the smallest number with distinct digits whose digits add up to 45? 