Let's break down the description of the gate's behavior.
1. "Inhibited by sending a low into one of the inputs": This means if any input is LOW (logic 0), the output is forced to a specific, fixed state, regardless of the other inputs.
2. "the output is HIGH": This fixed state is HIGH (logic 1).
So, we are looking for a logic gate where if any input is 0, the output is always
1. Let's test the options for a 2-input gate with inputs A and B. We'll set B=0 and see what happens to the output. \[\begin{array}{rl} \bullet & \text{NOR: Output = \( (A+B)' \). If B=0, Output = \( (A+0)' = A' \). The output depends on A, so it's not inhibited to a fixed state.} \\ \bullet & \text{AND: Output = \( A \cdot B \). If B=0, Output = \( A \cdot 0 = 0 \) (LOW). The output is fixed, but it's LOW, not HIGH.} \\ \bullet & \text{OR: Output = \( A+B \). If B=0, Output = \( A+0 = A \). The output depends on A, so it's not inhibited.} \\ \bullet & \text{NAND: Output = \( (A \cdot B)' \). If B=0, Output = \( (A \cdot 0)' = (0)' = 1 \) (HIGH). The output is forced to a fixed state (HIGH) whenever any input is LOW.} \\ \end{array}\] This perfectly matches the description of a NAND gate.
The Boolean expression for the following truth table is:
Write the simplified form of the Boolean expression \( (A + C)(AD + AD') + AC + C \):