Question:

How many NAND gates are required to implement a full adder?

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NAND and NOR are called Universal Gates because every digital circuit can be implemented using only NAND gates or only NOR gates.
Updated On: Jun 25, 2026
  • Eight
  • Ten
  • Six
  • Nine
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The Correct Option is D

Solution and Explanation

Concept: A Full Adder is a combinational circuit that adds three binary inputs: \[ A,\quad B,\quad C_{in} \] and produces: \[ \text{Sum} \] and \[ C_{out}. \] Since NAND gates are universal gates, a full adder can be implemented entirely using NAND gates.

Step 1:
Recall the Full Adder equations.
The Sum output is \[ S=A\oplus B\oplus C_{in}. \] The Carry output is \[ C_{out}=AB+BC_{in}+AC_{in}. \]

Step 2:
Implement using NAND gates only.
Using NAND-only realization, both XOR and carry circuits are constructed using NAND networks. The standard implementation requires \[ 9 \] NAND gates.

Step 3:
Select the answer.
Hence the number of NAND gates required is \[ \boxed{9}. \] Therefore option (D) is correct.
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