Concept:
A Full Adder is a combinational circuit that adds three binary inputs:
\[
A,\quad B,\quad C_{in}
\]
and produces:
\[
\text{Sum}
\]
and
\[
C_{out}.
\]
Since NAND gates are universal gates, a full adder can be implemented entirely using NAND gates.
Step 1: Recall the Full Adder equations.
The Sum output is
\[
S=A\oplus B\oplus C_{in}.
\]
The Carry output is
\[
C_{out}=AB+BC_{in}+AC_{in}.
\]
Step 2: Implement using NAND gates only.
Using NAND-only realization, both XOR and carry circuits are constructed using NAND networks.
The standard implementation requires
\[
9
\]
NAND gates.
Step 3: Select the answer.
Hence the number of NAND gates required is
\[
\boxed{9}.
\]
Therefore option (D) is correct.