An \(n\)-channel MOSFET is connected as shown in the figure below. Assume \(V_{TH}=1\) V, \(V_{DD}=5\) V, and \(\mu C_{ox}\left(\dfrac{W}{L}\right)=2\text{ mA V}^{-2}\), and neglect channel length modulation effects. The gate voltage \(V_G\) of the \(n\)-channel MOSFET (in Volt) is . (Rounded off to two decimal places)
Show Hint
The gate tied to the drain forces \(V_{GS}=V_{DS}\), so the device stays in saturation; combine this with the resistor's KVL equation.
Step 1: Identify the MOSFET connection.
The gate of the MOSFET is tied directly to its drain, which is the standard diode-connected configuration. The source is grounded, and a \(1\text{ k}\Omega\) resistor connects \(V_{DD}\) to the common gate-drain node, which is \(V_G\).
Since gate and drain are the same node here,
\[
V_{GS}=V_{DS}=V_G
\]
Step 2: Confirm the region of operation.
For a diode-connected NMOS, \(V_{DS}=V_{GS}\), so
\[
V_{DS}-(V_{GS}-V_{TH}) = V_{TH} > 0
\]
This means \(V_{DS}\) always exceeds the saturation boundary once the device is on, so the transistor operates in saturation.
Step 3: Write the saturation current equation.
\[
I_D = \frac{1}{2}\mu C_{ox}\left(\frac{W}{L}\right)(V_{GS}-V_{TH})^2 = \frac{1}{2}(2\text{ mA V}^{-2})(V_G-1)^2 = (V_G-1)^2\text{ mA}
\]
Step 4: Apply KVL through the resistor.
The same current \(I_D\) flows through the \(1\text{ k}\Omega\) resistor from \(V_{DD}\), so
\[
V_{DD} = I_D R + V_G
\]
\[
5 = I_D(1) + V_G
\]
\[
I_D = 5-V_G
\]
Step 5: Combine the two current expressions.
\[
(V_G-1)^2 = 5-V_G
\]
\[
V_G^2-2V_G+1 = 5-V_G
\]
\[
V_G^2-V_G-4 = 0
\]
Step 6: Solve the quadratic.
\[
V_G = \frac{1\pm\sqrt{1+16}}{2} = \frac{1\pm\sqrt{17}}{2}
\]
Since \(\sqrt{17}\approx4.123\), the two roots are approximately \(2.5616\) and \(-1.5616\). A gate voltage cannot be negative here, since the transistor must be on with \(V_G>V_{TH}=1\), so we reject the negative root.
Step 7: Final answer.
\[
V_G \approx \boxed{2.56\text{ V}}
\]
